A high integrated SiGe-MMIC transceiver having voltage controlled oscillator (VCO), phase locked loop (PLL), dual-transmit block for amplitude shift keying (ASK) mode and pi/4-quadrature phase shift keying (QPSK) mode, and common receiver block for the dual modes is developed for 5.8GHz dedicated short range communications (DSRC) terminals. To obtain stability of transceiver using differential configuration, which has on-chip closed loops generated by common ground/ Fee pad arrangement and differential pairs, the stabilized MMIC design method based on the loop analysis is introduced to it. In the loop analysis, the both on-chip loops of differential mode and common mode are considered, the maximum loop gain of less than -3dB all over the frequency range is defined as the absolute stabilized condition. The simulated results for each loops show that isolation resistors Inserted in bias feed line are effective for improving the stability. The effectiveness of the design method is evaluated by the measured results. The SiGe-MMIC transceiver having the stabilized amplifier chain is fabricated in 0.35μm SiGe-BiCMOS, and it achieves the adjacent channel power ratio (ACPR) of -38.2dBc under the ASK modulation and that of-47.2dBc under the pi/4-QPSK modulation.