The purpose of this paper is to describe an architecture of a high-speed linear phase FIR filter. This filter can provide an output equivalent to a higher-order FIR digital filter due to using a number of lower-order linear phase Cascaded Integrator Comb (CIC) subfilters or linear phase Cascaded Differential Comb (CDC) subfilters. Designing of the filter is required only to determine a low-order CIC( CDC) subfilters provided that a Multiple Mapping Function(MMF) is given. Thus, it is considered that the proposed architecture has a potential to make the design of a higher-order FIR filter easy. As an example, this filter equivalent to a conventional linear phase FIR filter with about 11-45 filter lengths has been designed and implemented into an LSI.