Analog pre-distortion linearizer using self base bias controlled amplifier

Shintaro Shinjo, Kazutomi Mori, Keiki Yamada, Noriharu Suematsu, Mitsuhiro Shimozawa

研究成果: Article査読

抄録

An analog pre-distortion linearizer employing a radio frequency (RF) transistor with a self base bias control circuit is proposed. The self base bias control circuit extracts the envelope from the modulated input RF signal of the RF transistor and automatically controls its base current according to the extracted envelope. As a result, the proposed linearizer realizes positive gain deviation at high input power level. By adding a resistor between the RF transistor and the self base bias control circuit, the negative gain deviation can be derived. The design of the proposed lineaizer is described with taking the envelope frequency response of the self base bias control circuit into consideration. The fabricated linearizer achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1 dB for a 2 GHz-band, 10 W-class GaAs FET high-power amplifier (HPA) with negative gain deviation for W-CDMA base stations. It also achieves the ACLR improvement of 8.3 dB for a LDMOS HPA with positive gain deviation for the same application.

本文言語English
ページ(範囲)966-974
ページ数9
ジャーナルIEICE Transactions on Electronics
E93-C
7
DOI
出版ステータスPublished - 2010 7
外部発表はい

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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