An energy-efficient dynamic memory address mapping mechanism

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

DRAM-based main memories are energy-hungry components of modern computer systems. Since accesses to DRAM need a complex protocol, the performance of an address-mapping scheme that decides physical locations of data based on physical addresses has a big impact on energy consumption. To improve the energy efficiency, this paper proposes a mechanism that dynamically selects an appropriate address-mapping scheme under the consideration of a trade-off between performance and power consumption. The mechanism works so as to reduce the energy consumption of the main memory. The evaluation results show that the proposed mechanism can reduce the energy consumption in comparison with conventional address-mapping schemes, which do not change their address mappings.

本文言語English
ホスト出版物のタイトルIEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings
出版社Institute of Electrical and Electronics Engineers Inc.
ISBN(電子版)9781467373258
DOI
出版ステータスPublished - 2015 7 14
イベント18th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2015 - Yokohama, Japan
継続期間: 2015 4 132015 4 15

出版物シリーズ

名前IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XVIII - Proceedings

Other

Other18th IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips 2015
国/地域Japan
CityYokohama
Period15/4/1315/4/15

ASJC Scopus subject areas

  • ハードウェアとアーキテクチャ
  • 電子工学および電気工学

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