An efficient intersection algorithm design of ray tracing for many-core graphics processors

研究成果: Conference contribution

抄録

Many-core processors have a vast potential to achieve interactive photo-realistic image synthesis by ray tracing. However, they need new efforts in program design to extract their performance. This paper proposes an architectureaware ray-triangle intersection test algorithm. As the raytriangle tests are the highest cost kernel in ray tracing, this paper explores an effective design and implementation of an intersection algorithm on a graphics processing unit (GPU) with many cores, and evaluates its performance through several experiments. Our intersection algorithm implementation can achieve the fast intersection tests by high-performance parallel processing on a many-core GPU with effective data management and load balancing. Experimental results show that our intersection algorithm on a 128-core GPU achieves 105 times faster intersection tests than that on a single-core processor. These results indicate that our intersection algorithm is promising in the coming era of many-core processors.

本文言語English
ホスト出版物のタイトルProceedings of the 10th IASTED International Conference on Computer Graphics and Imaging, CGIM 2008
ページ165-171
ページ数7
出版ステータスPublished - 2008
イベント10th IASTED International Conference on Computer Graphics and Imaging, CGIM 2008 - Innsbruck, Austria
継続期間: 2008 2 132008 2 15

出版物シリーズ

名前Proceedings of the 10th IASTED International Conference on Computer Graphics and Imaging, CGIM 2008

Other

Other10th IASTED International Conference on Computer Graphics and Imaging, CGIM 2008
国/地域Austria
CityInnsbruck
Period08/2/1308/2/15

ASJC Scopus subject areas

  • コンピュータ グラフィックスおよびコンピュータ支援設計
  • コンピュータ ビジョンおよびパターン認識

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