A vertical-MOSFET-based digital core circuit for high-speed low-power vector matching

Yitao Ma, Tetsuo Endoh, Tadashi Shibata

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

A vertical-MOSFET-based digital core circuit with vector matching function is proposed for achieving high-speed and low-power operation. The circuit designs with both planar and vertical MOSFET model are performed under 180nm CMOS technology, and the circuit operation is verified by NanoSim hardware simulation. Comparing with the conventional planar MOSFET case, the power consumption of the vertical MOSFET based circuit achieves more than 30% reduction without dependence on operating frequency. Furthermore, as circuit delay time can be suppressed, the vertical MOSFET based circuit also achieves the much higher maximum operating frequency than the planar MOSFET case up to 360MHz under the exactly same simulation conditions. This proposed core circuit can be flexibly utilized not only as an independent vector matching circuit but also as a unit circuit in the multi-core vector matching system.

本文言語English
ホスト出版物のタイトル2011 International SoC Design Conference, ISOCC 2011
ページ203-206
ページ数4
出版ステータスPublished - 2011 12 1
イベント8th International SoC Design Conference 2011, ISOCC 2011 - Jeju, Korea, Republic of
継続期間: 2011 11 172011 11 18

出版物シリーズ

名前2011 International SoC Design Conference, ISOCC 2011

Other

Other8th International SoC Design Conference 2011, ISOCC 2011
国/地域Korea, Republic of
CityJeju
Period11/11/1711/11/18

ASJC Scopus subject areas

  • ハードウェアとアーキテクチャ
  • 電子工学および電気工学

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