TY - JOUR
T1 - A SiGe HBT IC chipset for 40-Gb/s optical transmission systems
AU - Masuda, T.
AU - Shiramizu, N.
AU - Ohue, E.
AU - Oda, K.
AU - Hayami, R.
AU - Kondo, M.
AU - Onai, T.
AU - Washio, K.
AU - Ohhata, K.
AU - Arakawa, F.
AU - Tanabe, M.
AU - Shemamoto, H.
AU - Harada, T.
PY - 2003/3
Y1 - 2003/3
N2 - Using a 0.2-μm self-aligned epitaxial-growth silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technology, we have developed a chipset for 40-Gb/s time-division multiplexing optical transmission systems. In this paper, we describe seven analog and digital ICs: a 45-GHz bandwidth transimpedance amplifier, a 48.7-GHz bandwidth automatic-gain-controllable amplifier, a 40-Gb/s decision circuit, a 40-Gb/s full-wave rectifier, a 40-Gb/s limiting amplifier with a 32-dB gain, a 45-Gb/s 1:4 demultiplexer, and a 45-Gb/ s 4:1 multiplexer. To increase bandwidth of the transimpedance amplifier, a common-base input stage is introduced. In order to have high gain and wide bandwidth simultaneously, active load circuits composed of a differential transimpedance amplifier are used for the AGC amplifier, the limiting amplifier, and the decision circuit. Full-rate clocking is employed to reduce the influence caused by clock-duty variation in digital circuits such as the decision circuit, the demultiplexer, and the multiplexer. All ICs were characterized by using on-wafer probes, and some of them were built in brass-packages for bit-error rate measurement.
AB - Using a 0.2-μm self-aligned epitaxial-growth silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technology, we have developed a chipset for 40-Gb/s time-division multiplexing optical transmission systems. In this paper, we describe seven analog and digital ICs: a 45-GHz bandwidth transimpedance amplifier, a 48.7-GHz bandwidth automatic-gain-controllable amplifier, a 40-Gb/s decision circuit, a 40-Gb/s full-wave rectifier, a 40-Gb/s limiting amplifier with a 32-dB gain, a 45-Gb/s 1:4 demultiplexer, and a 45-Gb/ s 4:1 multiplexer. To increase bandwidth of the transimpedance amplifier, a common-base input stage is introduced. In order to have high gain and wide bandwidth simultaneously, active load circuits composed of a differential transimpedance amplifier are used for the AGC amplifier, the limiting amplifier, and the decision circuit. Full-rate clocking is employed to reduce the influence caused by clock-duty variation in digital circuits such as the decision circuit, the demultiplexer, and the multiplexer. All ICs were characterized by using on-wafer probes, and some of them were built in brass-packages for bit-error rate measurement.
KW - Automatic-gain-controllable amplifier
KW - Decision circuit
KW - Demultiplexer
KW - Full-wave rectifier
KW - Limiting amplifier
KW - Multiplexer
KW - SiGe HBT
KW - Transimpedance amplifier
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U2 - 10.1142/S0129156403001594
DO - 10.1142/S0129156403001594
M3 - Article
AN - SCOPUS:12144290273
VL - 13
SP - 239
EP - 263
JO - International Journal of High Speed Electronics and Systems
JF - International Journal of High Speed Electronics and Systems
SN - 0129-1564
IS - 1
ER -