A parallel architecture for quadtree-based fractal image coding

Shinhaeng Lee, S. Omachi, H. Aso

研究成果: Conference contribution

9 被引用数 (Scopus)

抄録

This paper proposes a parallel architecture for quadtree-based fractal image coding. This architecture is capable of performing the fractal image coding based on quadtree partitioning without the external memory for the fixed domain pool. Since a large domain block consists of small domain blocks, the calculations of distortion for all kinds of domain blocks are performed by the summation of the distortions for the maximum-depth domain pool which is extracted from the smallest range blocks of the neighbor processors. Fast comparison module is proposed for this architecture. This module can compute the distortions between range blocks and their eight isometric transformations by one full rotation around the center.

本文言語English
ホスト出版物のタイトルProceedings - 2000 International Conference on Parallel Processing, ICPP 2000
編集者David J. Lilja
出版社Institute of Electrical and Electronics Engineers Inc.
ページ15-22
ページ数8
ISBN(電子版)0769507689
DOI
出版ステータスPublished - 2000 1 1
イベントInternational Conference on Parallel Processing, ICPP 2000 - Toronto, Canada
継続期間: 2000 8 212000 8 24

出版物シリーズ

名前Proceedings of the International Conference on Parallel Processing
2000-January
ISSN(印刷版)0190-3918

Other

OtherInternational Conference on Parallel Processing, ICPP 2000
国/地域Canada
CityToronto
Period00/8/2100/8/24

ASJC Scopus subject areas

  • ソフトウェア
  • 数学 (全般)
  • ハードウェアとアーキテクチャ

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