A multi-level-cell spin-transfer torque memory with series-stacked magnetotunnel junctions

T. Ishigaki, T. Kawahara, R. Takemura, K. Ono, K. Ito, H. Matsuoka, H. Ohno

研究成果: Conference contribution

100 被引用数 (Scopus)

抄録

We first report a multi-level-cell (MLC) spin-transfer torque memory (SPRAM) with series-connected magnetotunnel junctions (MTJs). The series MTJs (with different areas) show multi-level resistances by a combination of their magnetization directions. A four-level operation by spin-transfer-torque writing was experimentally demonstrated. A scheme for the write/read operation of the MLC SPRAM was also presented. Keywords: MRAM, SPRAM, spin, multi-bit, and MLC.

本文言語English
ホスト出版物のタイトル2010 Symposium on VLSI Technology, VLSIT 2010
ページ47-48
ページ数2
DOI
出版ステータスPublished - 2010 10月 19
イベント2010 Symposium on VLSI Technology, VLSIT 2010 - Honolulu, HI, United States
継続期間: 2010 6月 152010 6月 17

出版物シリーズ

名前Digest of Technical Papers - Symposium on VLSI Technology
ISSN(印刷版)0743-1562

Other

Other2010 Symposium on VLSI Technology, VLSIT 2010
国/地域United States
CityHonolulu, HI
Period10/6/1510/6/17

ASJC Scopus subject areas

  • 電子工学および電気工学

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