A low-power MTJ-based nonvolatile FPGA using self-terminated logic-in-memory structure

Daisuke Suzuki, Takahiro Hanyu

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

A nonvolatile field-programmable gate array (NVFPGA), where both magnetic tunnel junction (MTJ) devices and greedy power-saving techniques are utilized, is proposed. Because the circuit components are shared among several MTJ devices by the use of logic-in-memory (LIM) structure, the number of leakage current paths is reduced, which results in leakage power reduction during power-on. Moreover, the use of the self-termination scheme, which automatically turns off the write current immediately after the desired data is written, makes it possible to minimize power consumption during the backup operation. In fact, the proposed NVFPGA exhibits a 90 % power reduction in comparison with that of a conventional SRAM-based FPGA under typical benchmark-circuit implementations.

本文言語English
ホスト出版物のタイトルFPL 2016 - 26th International Conference on Field-Programmable Logic and Applications
出版社Institute of Electrical and Electronics Engineers Inc.
ISBN(電子版)9782839918442
DOI
出版ステータスPublished - 2016 9 26
イベント26th International Conference on Field-Programmable Logic and Applications, FPL 2016 - Lausanne, Switzerland
継続期間: 2016 8 292016 9 2

出版物シリーズ

名前FPL 2016 - 26th International Conference on Field-Programmable Logic and Applications

Other

Other26th International Conference on Field-Programmable Logic and Applications, FPL 2016
国/地域Switzerland
CityLausanne
Period16/8/2916/9/2

ASJC Scopus subject areas

  • コンピュータ ネットワークおよび通信
  • コンピュータ サイエンスの応用
  • 制御と最適化

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