A hardware prefetching mechanism for vector gather instructions

研究成果: Conference contribution

抄録

Vector gather instructions are responsible for handling indirect memory accesses in vector processing. Since the indirect memory accesses usually express irregular access patterns, they have relatively low spatial and temporal locality compared with regular access patterns. As a result, an application with many vector gather instructions suffers from long latencies of the indirect memory accesses. Thus, the long latencies cause a significant performance degradation in vector processing. This paper proposes a hardware prefetching mechanism to hide memory access latencies of indirect memory accesses. The mechanism prefetches cacheable index data before executing a vector gather instruction, and predicts the addresses of the memory requests issued by the vector gather instruction. The mechanism then tries to prefetch the data based on the predicted addresses. As a result, the mechanism can reduce the memory access latencies of vector gather instructions. Moreover, this paper discusses how many cache blocks should be loaded per prediction regarding a single vector gather instruction by varying the prefetching parameters of distance and degree. In the evaluation, the performance of a simple kernel is examined with two types of index data: sequential and random. The evaluation results show that the prefetching mechanism improves the performance of the sequential-indexed and random-indexed kernels by 2.2x and 1.2x, respectively.

本文言語English
ホスト出版物のタイトル2019 IEEE/ACM 9th Workshop on Irregular Applications
ホスト出版物のサブタイトルArchitectures and Algorithms, IA3 2019
出版社Institute of Electrical and Electronics Engineers Inc.
ページ59-66
ページ数8
ISBN(電子版)9781728159874
DOI
出版ステータスPublished - 2019 11
イベント9th IEEE/ACM Workshop on Irregular Applications: Architectures and Algorithms, IA3 2019 - Denver, United States
継続期間: 2019 11 18 → …

出版物シリーズ

名前2019 IEEE/ACM 9th Workshop on Irregular Applications: Architectures and Algorithms, IA3 2019

Conference

Conference9th IEEE/ACM Workshop on Irregular Applications: Architectures and Algorithms, IA3 2019
国/地域United States
CityDenver
Period19/11/18 → …

ASJC Scopus subject areas

  • ソフトウェア
  • 計算数学
  • ハードウェアとアーキテクチャ

フィンガープリント

「A hardware prefetching mechanism for vector gather instructions」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル