TY - JOUR
T1 - A design of a Capacitorless 1T-DRAM Cell Using Gate-induced Drain Leakage (GIDL) Current for Low-power and High-speed Embedded Memory
AU - Yoshida, Eiji
AU - Tanaka, Tetsu
N1 - Copyright:
Copyright 2008 Elsevier B.V., All rights reserved.
PY - 2003
Y1 - 2003
N2 - A capacitorless 1T-DRAM cell using gate-induced drain leakage (GIDL) current for write operation was demonstrated for the first time. Compared with the conventional write operation with impact ionization current, write operation with GIDL current provides low-power and high-speed operation. The capacitorless 1T-DRAM is the most promising technology for high performance embedded DRAM LSI.
AB - A capacitorless 1T-DRAM cell using gate-induced drain leakage (GIDL) current for write operation was demonstrated for the first time. Compared with the conventional write operation with impact ionization current, write operation with GIDL current provides low-power and high-speed operation. The capacitorless 1T-DRAM is the most promising technology for high performance embedded DRAM LSI.
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M3 - Conference article
AN - SCOPUS:0842266492
SP - 913
EP - 916
JO - Technical Digest - International Electron Devices Meeting
JF - Technical Digest - International Electron Devices Meeting
SN - 0163-1918
T2 - IEEE International Electron Devices Meeting
Y2 - 8 December 2003 through 10 December 2003
ER -