A Design Framework for Invertible Logic

N. Onizawa, K. Nishino, S. Smithson, B. Meyer, W. Gross, H. Yamagata, H. Fujita, T. Hanyu

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

Invertible logic using a probabilistic magnetoresistive device model has been recently presented that can operate in bidirectional ways and solve several problems quickly, such as factorization and combinational optimization. In this paper, we present a design framework for large-scale invertible logic circuits. Our approach makes use of linear programming to create a Hamiltonian library with the minimum number of nodes. In addition, as the device model is approximated based on stochastic computing in SystemVerilog, a faster simulation using the compiled SystemC binary is realized than a conventional SPICE-level simulation. We have evaluated our framework on designing invertible multipliers, which realizes almost 5 order-of-magnitude faster simulation than a conventional method.

本文言語English
ホスト出版物のタイトルConference Record - 53rd Asilomar Conference on Circuits, Systems and Computers, ACSSC 2019
編集者Michael B. Matthews
出版社IEEE Computer Society
ページ312-316
ページ数5
ISBN(電子版)9781728143002
DOI
出版ステータスPublished - 2019 11
イベント53rd Asilomar Conference on Circuits, Systems and Computers, ACSSC 2019 - Pacific Grove, United States
継続期間: 2019 11 32019 11 6

出版物シリーズ

名前Conference Record - Asilomar Conference on Signals, Systems and Computers
2019-November
ISSN(印刷版)1058-6393

Conference

Conference53rd Asilomar Conference on Circuits, Systems and Computers, ACSSC 2019
国/地域United States
CityPacific Grove
Period19/11/319/11/6

ASJC Scopus subject areas

  • 信号処理
  • コンピュータ ネットワークおよび通信

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