A comparison of retrograde and conventional N-wells for sub-micron CMOS circuits

A. G. Lewis, R. A. Martin, J. Y. Chen, T. Y. Huang, M. Koyanagi

研究成果: Conference contribution

抄録

A general and direct comparison of retrograde and conventional n-well CMOS technologies is reported. The advantages of the retrograde structures in terms of packing density, isolation and short channel PMOS characteristics are demonstrated. The conventional wells offer slightly better circuit performance due to lower p + to n-well junction capacitance. However, the major difference between the well types lies in their latchup susceptibility: here the retrograde wells have a significant advantage due to their lower sheet resistance and greater tolerance to very thin p-on-p + epitaxial layers.

本文言語English
ホスト出版物のタイトルESSDERC 1987 - 17th European Solid State Device Research Conference
出版社IEEE Computer Society
ページ581-584
ページ数4
ISBN(電子版)0444704779
ISBN(印刷版)9780444704771
出版ステータスPublished - 1987 1月 1
イベント17th European Solid State Device Research Conference, ESSDERC 1987 - Bologna, Italy
継続期間: 1987 9月 141987 9月 17

出版物シリーズ

名前European Solid-State Device Research Conference
ISSN(印刷版)1930-8876

Other

Other17th European Solid State Device Research Conference, ESSDERC 1987
国/地域Italy
CityBologna
Period87/9/1487/9/17

ASJC Scopus subject areas

  • 電子工学および電気工学
  • 安全性、リスク、信頼性、品質管理

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