The structure and performances of a CMOS image sensor fabricated by integrating technologies in a series of process flow that achieve wide spectral response, high robustness to ultraviolet (UV) light, high conversion gain (CG) and high full well capacity (FWC) is described. For PD junction formation, a high concentration p+ layer with steep dopant concentration profile was formed on a thick p-epitaxial layer. The concentration of the surface p+ layer was tuned sufficiently high in order to maintain the high UV light sensitivity and dark current against the deuterium lamp irradiation. For the FD structure, a lightly doped drain implantation before sidewall formation was omitted to reduce gate overlap capacitance. A CMOS image sensor using a 0.18 μm CMOS process technology achieved a high CG of 240 μV/e-, a high FWC of 200 ke-, a wide spectral response for 190-1000 nm and a high robustness to deuterium lamp irradiation stress.
|ジャーナル||ITE Transactions on Media Technology and Applications|
|出版ステータス||Published - 2016|
ASJC Scopus subject areas
- コンピュータ グラフィックスおよびコンピュータ支援設計