A low-voltage differential signaling (LVDS) driver with a new current reuse topology is proposed for low power-supply voltage (VDD) operation. The proposed driver has a new current mirror with shared MOSFET and is designed using vertical MOSFETs. The new current mirror reduces the output degradation to less than half of the conventional. And the design with vertical MOSFETs reduces the voltage drop of the eight-stage cascode circuit to 77.6% of that with planar ones. Our current reuse driver achieves 3-mW/Gbps with 2.5-Gbps and 1.8-V VDD operation in the simulation using 0.18-m gate length MOSFET parameters. The achieved reduction of the power normalized by the output power at 1.8-V VDD is larger than 30% of that for the conventional drivers.
ASJC Scopus subject areas
- Physics and Astronomy(all)