A 24-GHz low-power fully integrated receiver with image-rejection using rich-transformer direct-stacked/coupled technique

Nobuhiro Shiramizu, Takahiro Nakamura, Toru Masuda, Katsuyoshi Washio

研究成果: Conference contribution

2 引用 (Scopus)

抜粋

We have developed a low-power, fully integrated receiver for 24-GHz ISM band wireless communication using a Rich-Transformer Direct-Stacked/Coupled (RT-DSC) technique. This technique makes it possible to reduce supply voltage and current without any performance degradation. The 24-GHz receiver circuit was fabricated using 0.18-μm SiGe BiCMOS technology. Receiver gain of 30 dB and noise figure (NF) of 5.6 dB are obtained at low power consumption of 21.5 mW. We utilized the synergistic effect of combining a narrow-band transformer and a notch filter to integrate the circuit's image rejection (IR) function. This resulted in our achieving power consumption only 30 % of that reported previously.

元の言語English
ホスト出版物のタイトルProceedings of the 2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010
ページ369-372
ページ数4
DOI
出版物ステータスPublished - 2010 7 16
外部発表Yes
イベント2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010 - Anaheim, CA, United States
継続期間: 2010 5 232010 5 25

出版物シリーズ

名前Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
ISSN(印刷物)1529-2517

Other

Other2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010
United States
Anaheim, CA
期間10/5/2310/5/25

ASJC Scopus subject areas

  • Engineering(all)

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  • これを引用

    Shiramizu, N., Nakamura, T., Masuda, T., & Washio, K. (2010). A 24-GHz low-power fully integrated receiver with image-rejection using rich-transformer direct-stacked/coupled technique. : Proceedings of the 2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010 (pp. 369-372). [10.1109/RFIC.2010.5477295] (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium). https://doi.org/10.1109/RFIC.2010.5477295