32 multiplied by 32 BIT MULTIPLIER USING MULTIPLE-VALUED MOS CURRENT-MODE CIRCUITS.

Shoji Kawahito, Michitaka Kameyama, Tatsuo Higuchi, Haruyasu Yamada

研究成果: Conference article査読

2 被引用数 (Scopus)

抄録

The authors present a high-speed compact multiplier based on the radix-four signed-digit (SD) number system. Multiple-valued bidirectional current-mode (BDCM) circuits are used for the implementation of the circuit. The BDCM circuits are composed of two types of enhancement-mode MOS devices and a depletion-mode p-channel MOS device used for a current source. Reported performance results show the effectiveness of the approach.

本文言語English
ページ(範囲)99-100
ページ数2
ジャーナルDigest of Technical Papers - Symposium on VLSI Technology
出版ステータスPublished - 1987 12 1
イベントDig Tech Pap Symp VLSI Technol 1987 - Karuizawa, Jpn
継続期間: 1987 5 221987 5 23

ASJC Scopus subject areas

  • 電子工学および電気工学

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