3-Layer Stacked Pixel-Parallel CMOS Image Sensors Using Hybrid Bonding of SOI Wafers

Masahide Goto, Yuki Honda, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, Toshiro Hiramoto

研究成果: Conference article査読

1 被引用数 (Scopus)

抄録

We report 3-layer stacked pixel-parallel CMOS image sensors developed for the first time. The hybrid bonding of silicon-on-insulator wafers through damascened Au electrodes in a SiO2 insulator on the front and backside realizes both face-to-face and face-to-back bonding, developing a multi-layer stacked device. A 3-layered pixel circuit is developed to confirm the linear response of 16-bit digital signal output. A prototype sensor with 160 120 pixels successfully captures video images, demonstrating the feasibility of multi-layered sensors of high performance as well as multi-functions including signal processing, memory, and computing for applications such as high-quality video cameras, measurements, recognition, robots, and various IoT devices.

本文言語English
論文番号258
ジャーナルIS and T International Symposium on Electronic Imaging Science and Technology
34
7
DOI
出版ステータスPublished - 2022
イベントIS and T International Symposium on Electronic Imaging: Imaging Sensors and Systems, ISS 2022 - Virtual, Online
継続期間: 2022 1月 172022 1月 26

ASJC Scopus subject areas

  • コンピュータ グラフィックスおよびコンピュータ支援設計
  • コンピュータ サイエンスの応用
  • 人間とコンピュータの相互作用
  • ソフトウェア
  • 電子工学および電気工学
  • 原子分子物理学および光学

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