2 Mb SPRAM (SPin-Transfer Torque RAM) With Bit-by-Bit Bi-Directional Current Write and Parallelizing-Direction Current Read

Takayuki Kawahara, Riichiro Takemura, Katsuya Miura, Jun Hayakawa, Shoji Ikeda, Young Min Lee, Ryutaro Sasaki, Yasushi Goto, Kenchi Ito, Toshiyasu Meguro, Fumihiro Matsukura, Hiromasa Takahashi, Hideyuki Matsuoka, Hideo Ohno

研究成果: Article査読

198 被引用数 (Scopus)

抄録

A 1.8 V 2 Mb SPin-transfer torque RAM (SPRAM) chip using a 0.2 μm logic process with an MgO tunneling barrier cell demonstrates the circuit technologies for potential low-power nonvolatile RAM, or universal memory. This chip features an array scheme with bit-by-bit bi-directional current writing to achieve proper spin-transfer torque writing of 100 ns, and parallelizing-direction current reading with a low-voltage bit-line for preventing read disturbances that lead to 40 ns access time.

本文言語English
ページ(範囲)109-120
ページ数12
ジャーナルIEEE Journal of Solid-State Circuits
43
1
DOI
出版ステータスPublished - 2008 1

ASJC Scopus subject areas

  • 電子工学および電気工学

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