14ns write speed 128Mb density Embedded STT-MRAM with endurance>10 10 and 10yrs retention@85°C using novel low damage MTJ integration process

H. Sato, H. Honjo, T. Watanabe, M. Niwa, H. Koike, S. Miura, T. Saito, H. Inoue, T. Nasuno, T. Tanigawa, Y. Noguchi, T. Yoshiduka, M. Yasuhira, S. Ikeda, S. Y. Kang, T. Kubo, K. Yamashita, Y. Yagi, R. Tamura, T. Endoh

研究成果: Conference contribution

12 被引用数 (Scopus)

抄録

Novel damage control integration process technology has been developed through development of new low-damage MgO deposition process, low-damage RIE process, and low temperature SiN-cap process. Application of the developed damage control integration process technology to MTJ fabrication enabled us to demonstrate an improvement of TMR ratio, thermal stability factor, and switching efficiency. Moreover, it is shown that the endurance of the fabricated MTJs is over 10 10 , although thermal stability factor drastically increased. Finally, with the developed 37-nm p-MTJ technology and the damage control integration process technology, 128Mb density embedded STT-MRAM was fabricated. By using our 128Mb density STT-MRAM, 14ns write speed at V dd of 1.2V was successfully demonstrated. This result will contribute to low power MCU/IoT chip solution and so on.

本文言語English
ホスト出版物のタイトル2018 IEEE International Electron Devices Meeting, IEDM 2018
出版社Institute of Electrical and Electronics Engineers Inc.
ページ27.2.1-27.2.4
ISBN(電子版)9781728119878
DOI
出版ステータスPublished - 2019 1 16
イベント64th Annual IEEE International Electron Devices Meeting, IEDM 2018 - San Francisco, United States
継続期間: 2018 12 12018 12 5

出版物シリーズ

名前Technical Digest - International Electron Devices Meeting, IEDM
2018-December
ISSN(印刷版)0163-1918

Conference

Conference64th Annual IEEE International Electron Devices Meeting, IEDM 2018
国/地域United States
CitySan Francisco
Period18/12/118/12/5

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 凝縮系物理学
  • 電子工学および電気工学
  • 材料化学

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