@inproceedings{3ef20ab19bff49279b922e7bef4a13b2,
title = "Yield enhancement and mitigating the Si-chipping and wafer cracking in ultra-Thin 20μm-Thick 8-and 12-inch LSI wafer",
abstract = "We have meticulously investigated several pre-grinding parameters such as edge trimming width, depth, and edge-back rinse of smeared glue to mitigate the Si chipping and cracking and to enhance the yield in ultra-Thin LSI wafer thinning for the thickness value of up to 20 μm, with respect to different types of temporary bonding glue and the glue thickness. After optimizing several pre-grinding and the post-grinding parameters, we found that an intermediate edge-back-rinse process before the final grinding tremendously reduces the Si chipping and wafer cracking, which enhances the yield of ultra-Thin wafer grinding.",
keywords = "Si chipping, Wafer thinning, wafer cracking",
author = "M. Murugesan and T. Fukushima and Bea, {J. C.} and Lee, {K. W.} and M. Koyanagi",
year = "2015",
month = jul,
day = "22",
doi = "10.1109/ASMC.2015.7164435",
language = "English",
series = "2015 26th Annual SEMI Advanced Semiconductor Manufacturing Conference, ASMC 2015",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "435--439",
booktitle = "2015 26th Annual SEMI Advanced Semiconductor Manufacturing Conference, ASMC 2015",
note = "26th Annual SEMI Advanced Semiconductor Manufacturing Conference, ASMC 2015 ; Conference date: 03-05-2015 Through 06-05-2015",
}