TY - GEN
T1 - Write-Operation Frequency Reduction for Nonvoratile Logic LSI with a Short Break-Even Time
AU - Akutsu, Takeaki
AU - Natsui, Masanori
AU - Hanyu, Takahiro
PY - 2015/9/2
Y1 - 2015/9/2
N2 - A technique to save the frequency of write operation on the non-volatile memory is proposed for reducing dynamic power dissipation of non-volatile logic LSI which shortens its break-even time for power gating. The proposed technique is realized by combining a selective write method with a coding technique. The selective write method compares input words and stored words, and rejects redundant write operation. Moreover, the use of the data coding technique shortens the Hamming distance between adjacent words in an input data sequence and reduces the frequency of bit reversal in the non-volatile memory, which results in the further reduction in the power dissipation due to write operation. Through the design and evaluation of a non-volatile 8-bit counter, it is observed that the proposed technique shortens the break-even time for power gating by up to 85.2% with a small hardware overhead.
AB - A technique to save the frequency of write operation on the non-volatile memory is proposed for reducing dynamic power dissipation of non-volatile logic LSI which shortens its break-even time for power gating. The proposed technique is realized by combining a selective write method with a coding technique. The selective write method compares input words and stored words, and rejects redundant write operation. Moreover, the use of the data coding technique shortens the Hamming distance between adjacent words in an input data sequence and reduces the frequency of bit reversal in the non-volatile memory, which results in the further reduction in the power dissipation due to write operation. Through the design and evaluation of a non-volatile 8-bit counter, it is observed that the proposed technique shortens the break-even time for power gating by up to 85.2% with a small hardware overhead.
KW - data coding
KW - nonvolatile memory
KW - power gating
KW - selective write method
KW - write-operation frequency
UR - http://www.scopus.com/inward/record.url?scp=84957945192&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84957945192&partnerID=8YFLogxK
U2 - 10.1109/ISMVL.2015.18
DO - 10.1109/ISMVL.2015.18
M3 - Conference contribution
AN - SCOPUS:84957945192
T3 - Proceedings of The International Symposium on Multiple-Valued Logic
SP - 152
EP - 157
BT - Proceedings - 2015 IEEE 45th International Symposium on Multiple-Valued Logic, ISMVL 2015
PB - IEEE Computer Society
T2 - 45th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2015
Y2 - 18 May 2015 through 20 May 2015
ER -