A Wave-Parallel Computing (WPC) technique is proposed to address the interconnection problem in massively interconnected VLSI architectures. The fundamental concept is the multiplexing of several signals onto a single line using orthogonal sequences as information carriers. To reduce MUX/DEMUX circuits, we propose WPC concept which can process multiplexed data directly without decomposition. We investigate the possible implementation of WPC based on the present MOS technology, and propose the multiple-valued pseudo-orthogonal m-sequence carrier generation technique. Applications of WPC to neural networks and image processing are discussed, with emphasis on the reduction in the number of interconnections and on the noise tolerance property.
|Number of pages||6|
|Journal||Proceedings of The International Symposium on Multiple-Valued Logic|
|Publication status||Published - 1998 Jan 1|
|Event||Proceedings of the 1998 28th International Symposium on Multiple-Valued Logic - Fukuoka, Jpn|
Duration: 1998 May 27 → 1998 May 29
ASJC Scopus subject areas
- Computer Science(all)