Vth-variation compensation of multiple-valued current-mode circuit using TMR devices

Akihiro Hirosaki, Masatomo Miura, Atsushi Matsumoto, Takahiro Hanyu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A compensation method against a threshold-voltage (Vth) variation using tunneling magnetoresistive (TMR) devices, is proposed for a deep-submicron VLSI. The influence of the Vth variation in a single MOS transistor can be neglected by adjusting the source voltage of the MOS transistor. The desired circuit behavior is obtained by programming the resistance value of a TMR device which is connected to the MOS transistor in series. By using HSPICE simulation under a 90nm CMOS technology, it is demonstrated that a radix-2 signed-digit adder using the proposed method is robust against the Vth variation.

Original languageEnglish
Title of host publicationProceedings - 38th International Symposium on Multiple-Valued Logic, ISMVL 2008
Pages14-19
Number of pages6
DOIs
Publication statusPublished - 2008 Sep 3
Event38th International Symposium on Multiple-Valued Logic, ISMVL 2008 - Dallas, TX, United States
Duration: 2008 May 222008 May 24

Publication series

NameProceedings of The International Symposium on Multiple-Valued Logic
ISSN (Print)0195-623X

Other

Other38th International Symposium on Multiple-Valued Logic, ISMVL 2008
CountryUnited States
CityDallas, TX
Period08/5/2208/5/24

ASJC Scopus subject areas

  • Computer Science(all)
  • Mathematics(all)

Fingerprint Dive into the research topics of 'V<sub>th</sub>-variation compensation of multiple-valued current-mode circuit using TMR devices'. Together they form a unique fingerprint.

Cite this