VLSI-ORIENTED BI-DIRECTIONAL CURRENT-MODE ARITHMETIC CIRCUITS BASED ON THE RADIX-4 SIGNED-DIGIT NUMBER SYSTEM.

Shoji Kawahito; Michitaka Kameyama; Tatsuo Higuchi

VLSI-ORIENTED BI-DIRECTIONAL CURRENT-MODE ARITHMETIC CIRCUITS BASED ON THE RADIX-4 SIGNED-DIGIT NUMBER SYSTEM.

Shoji Kawahito, Michitaka Kameyama, Tatsuo Higuchi

INF - Computer and Mathematical Sciences

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

16 Citations (Scopus)

Abstract

VLSI-oriented arithmetic circuits based on the signed-digital (SD) number system are proposed. A new bidirectional current-mode circuit in MOS technology is effectively used for SD number arithmetic operations. The circuit interconnections can be drastically reduced in spite of the redundant SD number representation. A VLSI-oriented, very fast SD multiplier is designed that is based on parallel binary-tree addition scheme. The multiply time of an SD array multiplier based on 2- mu m design rules is less than 30 ns.

Original language	English
Title of host publication	Proceedings of The International Symposium on Multiple-Valued Logic
Publisher	IEEE
Pages	70-77
Number of pages	8
ISBN (Print)	0818606991
Publication status	Published - 1986 Jan 1

ASJC Scopus subject areas

Chemical Health and Safety
Hardware and Architecture
Safety, Risk, Reliability and Quality
Logic

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title = "VLSI-ORIENTED BI-DIRECTIONAL CURRENT-MODE ARITHMETIC CIRCUITS BASED ON THE RADIX-4 SIGNED-DIGIT NUMBER SYSTEM.",

abstract = "VLSI-oriented arithmetic circuits based on the signed-digital (SD) number system are proposed. A new bidirectional current-mode circuit in MOS technology is effectively used for SD number arithmetic operations. The circuit interconnections can be drastically reduced in spite of the redundant SD number representation. A VLSI-oriented, very fast SD multiplier is designed that is based on parallel binary-tree addition scheme. The multiply time of an SD array multiplier based on 2- mu m design rules is less than 30 ns.",

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AU - Kameyama, Michitaka

AU - Higuchi, Tatsuo

PY - 1986/1/1

Y1 - 1986/1/1

N2 - VLSI-oriented arithmetic circuits based on the signed-digital (SD) number system are proposed. A new bidirectional current-mode circuit in MOS technology is effectively used for SD number arithmetic operations. The circuit interconnections can be drastically reduced in spite of the redundant SD number representation. A VLSI-oriented, very fast SD multiplier is designed that is based on parallel binary-tree addition scheme. The multiply time of an SD array multiplier based on 2- mu m design rules is less than 30 ns.

AB - VLSI-oriented arithmetic circuits based on the signed-digital (SD) number system are proposed. A new bidirectional current-mode circuit in MOS technology is effectively used for SD number arithmetic operations. The circuit interconnections can be drastically reduced in spite of the redundant SD number representation. A VLSI-oriented, very fast SD multiplier is designed that is based on parallel binary-tree addition scheme. The multiply time of an SD array multiplier based on 2- mu m design rules is less than 30 ns.

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BT - Proceedings of The International Symposium on Multiple-Valued Logic

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ER -

VLSI-ORIENTED BI-DIRECTIONAL CURRENT-MODE ARITHMETIC CIRCUITS BASED ON THE RADIX-4 SIGNED-DIGIT NUMBER SYSTEM.

Abstract

ASJC Scopus subject areas

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