VLSI circuit design using an object-oriented framework of evolutionary graph generation system

Naofumi Homma, M. Natsui, Takafumi Aoki, T. Higuchi

Research output: Contribution to conferencePaper

Abstract

This paper presents a generic objected-oriented framework of evolutionary graph generation (EGG) for automated circuit synthesis. The EGG system can be systematically implemented for different design problems by inheriting the framework class templates. The potential capability of EGG framework is demonstrated through experimental synthesis of both digital and analogue circuits. Design examples discussed in this paper are: (i) bit-serial multipliers using bit-level arithmetic components; and (ii) current mirrors using transistor-level components.

Original languageEnglish
Pages115-122
Number of pages8
DOIs
Publication statusPublished - 2003 Jan 1
Event2003 Congress on Evolutionary Computation, CEC 2003 - Canberra, ACT, Australia
Duration: 2003 Dec 82003 Dec 12

Other

Other2003 Congress on Evolutionary Computation, CEC 2003
CountryAustralia
CityCanberra, ACT
Period03/12/803/12/12

ASJC Scopus subject areas

  • Computational Mathematics

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    Homma, N., Natsui, M., Aoki, T., & Higuchi, T. (2003). VLSI circuit design using an object-oriented framework of evolutionary graph generation system. 115-122. Paper presented at 2003 Congress on Evolutionary Computation, CEC 2003, Canberra, ACT, Australia. https://doi.org/10.1109/CEC.2003.1299564