Vertical 3D NAND flash memory technology

Akihiro Nitayama, Hideaki Aochi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

21 Citations (Scopus)


We've developed Bit Cost Scalable (BiCS) flash technology as a three-dimensional memory for the future ultra high density storage devices, which extremely reduces the chip costs by vertically stacking memory arrays with punch and plug process. We've advanced it into Pipe-shaped BiCS flash memory introducing U-shaped NAND string structure, to improve operation window, speed and reliability. 32 G bit test chips with 16 stacked layers by 60nm P-BiCS flash process have been fabricated, and the functionality of Multi-Level-Cell (MLC) operation has been successfully demonstrated. P-BiCS is the most promising candidate of three-dimensional ultra high density data storage memories.

Original languageEnglish
Title of host publicationULSI Process Integration 7
PublisherElectrochemical Society Inc.
Number of pages11
ISBN (Electronic)9781607682615
ISBN (Print)9781566779074
Publication statusPublished - 2011
Event7th Symposium on ULSI Process Integration - 220th ECS Meeting - Boston, MA, United States
Duration: 2011 Oct 92011 Oct 14

Publication series

NameECS Transactions
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737


Other7th Symposium on ULSI Process Integration - 220th ECS Meeting
Country/TerritoryUnited States
CityBoston, MA

ASJC Scopus subject areas

  • Engineering(all)


Dive into the research topics of 'Vertical 3D NAND flash memory technology'. Together they form a unique fingerprint.

Cite this