Ultra thin soi-pmosfet with elevated S/D and buried back gate

H. Oh, T. Sakaguchi, J. Shim, Takafumi Fukushima, H. Kurino, Mitsumasa Koyanagi

Research output: Contribution to conferencePaper

Abstract

We have proposed ultra thin FD-SOIMOSFETs with buried back gate to control their threshold voltage. They have elevated S/D with Ni suicide to improve current drivability. In this work, we fabricated ultra thin FD-SOI PMOSFETs with buried back gate and successfully control their threshold voltage. We also studied the effect of ion implantation on surface morphology of Si selectively epitaxial growth to form elevated S/D.

Original languageEnglish
Pages51-56
Number of pages6
Publication statusPublished - 2004 Dec 1
Event3rd International Conference on Semiconductor Technology, ISTC2004 - Shanghai, China
Duration: 2004 Sep 152004 Sep 17

Other

Other3rd International Conference on Semiconductor Technology, ISTC2004
CountryChina
CityShanghai
Period04/9/1504/9/17

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Oh, H., Sakaguchi, T., Shim, J., Fukushima, T., Kurino, H., & Koyanagi, M. (2004). Ultra thin soi-pmosfet with elevated S/D and buried back gate. 51-56. Paper presented at 3rd International Conference on Semiconductor Technology, ISTC2004, Shanghai, China.