A novel S/D junction technology for realising sub-0.1 μm NMOSFETs is proposed. In this technology, S/D extensions are formed using arsenic (As) diffusion from an As adsorbed atomic layer on the silicon surface by high temperature RTA. This method provides an extremely shallow extension (below 20nm) with low sheet-resistance (below 2kΩ/□), maintaining a low junction leakage. NMOSFETs fabricated using this technology show better suppression of the short channel effect compared to conventional FETs.
ASJC Scopus subject areas
- Electrical and Electronic Engineering