Ultra-low power brain-inspired processors and neuromorphic processors with CMOS/MTJ hybrid technology

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

In this invited Plenary-talk, technologies regarding to STT-MRAM and NVLogic such as NV-AI VLSIs with CMOS/MTJ Hybrid technology are reviewed with our recent research results including fabricated chips.

Original languageEnglish
Title of host publication2019 Silicon Nanoelectronics Workshop, SNW 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9784863487024
DOIs
Publication statusPublished - 2019 Jun
Event24th Silicon Nanoelectronics Workshop, SNW 2019 - Kyoto, Japan
Duration: 2019 Jun 92019 Jun 10

Publication series

Name2019 Silicon Nanoelectronics Workshop, SNW 2019

Conference

Conference24th Silicon Nanoelectronics Workshop, SNW 2019
CountryJapan
CityKyoto
Period19/6/919/6/10

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality
  • Electronic, Optical and Magnetic Materials

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