Ultimate top-down etching processes for future nanoscale devices

Seiji Samukawa; Kazuhiko Endo

doi:10.1109/ICSICT.2006.306301

Ultimate top-down etching processes for future nanoscale devices

Seiji Samukawa, Kazuhiko Endo

Innovative Energy Research Center

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

Our newly developed neutral beam (NB) etching could firstly accomplish the damage-free (defect-free and smooth surface) fabrication of high aspect rectangular Si-Fins. The fabricated FinFETs realize higher device performance (higher electron mobility) than that using a conventional reactive ion etching. The improved mobility is well explained by the atomically flatness of the neutral beam etched surfaces. Our new results strongly support the effectiveness of the NB technology for the nano-scale CMOS fabrication.

Original language	English
Title of host publication	ICSICT-2006
Subtitle of host publication	2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings
Publisher	IEEE Computer Society
Pages	462-465
Number of pages	4
ISBN (Print)	1424401615, 9781424401611
DOIs	https://doi.org/10.1109/ICSICT.2006.306301
Publication status	Published - 2006
Event	ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology - Shanghai, China Duration: 2006 Oct 23 → 2006 Oct 26

Publication series

Name	ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

Other

Other	ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology
Country/Territory	China
City	Shanghai
Period	06/10/23 → 06/10/26

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/ICSICT.2006.306301

Cite this

Samukawa, S., & Endo, K. (2006). Ultimate top-down etching processes for future nanoscale devices. In ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings (pp. 462-465). [4098136] (ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings). IEEE Computer Society. https://doi.org/10.1109/ICSICT.2006.306301

Ultimate top-down etching processes for future nanoscale devices. / Samukawa, Seiji; Endo, Kazuhiko.

ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings. IEEE Computer Society, 2006. p. 462-465 4098136 (ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Samukawa, S & Endo, K 2006, Ultimate top-down etching processes for future nanoscale devices. in ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings., 4098136, ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings, IEEE Computer Society, pp. 462-465, ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Shanghai, China, 06/10/23. https://doi.org/10.1109/ICSICT.2006.306301

Samukawa S, Endo K. Ultimate top-down etching processes for future nanoscale devices. In ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings. IEEE Computer Society. 2006. p. 462-465. 4098136. (ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings). doi: 10.1109/ICSICT.2006.306301

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AB - Our newly developed neutral beam (NB) etching could firstly accomplish the damage-free (defect-free and smooth surface) fabrication of high aspect rectangular Si-Fins. The fabricated FinFETs realize higher device performance (higher electron mobility) than that using a conventional reactive ion etching. The improved mobility is well explained by the atomically flatness of the neutral beam etched surfaces. Our new results strongly support the effectiveness of the NB technology for the nano-scale CMOS fabrication.

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Ultimate top-down etching processes for future nanoscale devices

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