Two-dimensional device simulation for avalanche induced short channel effect in poly-Si TFT

So Yamada, Shin Yokoyama, Mitsumasa Koyanagi

Research output: Contribution to journalConference article

17 Citations (Scopus)

Abstract

A novel two-dimensional device simulator for poly-Si TFTs (thin-film transistors) is developed, in which the effects of grain boundaries (GBs) are incorporated into the carrier mobility model. In this simulator, the basic semiconductor equations are iteratively solved in combination with the carrier generation/recombination model, which consists of avalanche, S-R-H, and Auger processes. By using this simulator, the effects of GBs on device characteristics are accurately evaluated. In addition, the avalanche-induced short channel effect in poly-Si TFTs is numerically analyzed.

Original languageEnglish
Pages (from-to)859-862
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
Publication statusPublished - 1990 Dec 1
Event1990 International Electron Devices Meeting - San Francisco, CA, USA
Duration: 1990 Dec 91990 Dec 12

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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