Abstract
Sidewall n+p+n+ and p+n+in+ structures were fabricated by area-selective molecular layer epitaxy of GaAs, and electrical evaluation was carried out on the structures by J -V measurement. In the n+p+n+ structure, tunneling current decreased as the thickness of the p+ layer increased. An Esaki peak was also observed when the p+ layer was thicker than the depletion layer. The J -V characteristic of the p+n+in+ structure depended on the thickness of the n+ layer, and its curve at the reverse bias shifted to the low voltage side when the n+ layer became thick.
Original language | English |
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Pages (from-to) | 2474-2477 |
Number of pages | 4 |
Journal | Physica Status Solidi (C) Current Topics in Solid State Physics |
Volume | 7 |
Issue number | 10 |
DOIs | |
Publication status | Published - 2010 Oct 1 |
Keywords
- Electrical characteristics
- GaAs
- MBE
- N-p-n
- P-n-in junctions
- Tunneling
ASJC Scopus subject areas
- Condensed Matter Physics