TMR design methodology for SPin-transfer torque RAM (SPRAM) with nonvolatile and SRAM compatible operations

R. Takemura, T. Kawahara, J. Hayakawa, K. Miura, K. Ito, M. Yamanouchi, S. Ikeda, H. Takahashi, H. Matsuoka, H. Ohno

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

Abstract

We propose a tunnel magneto resistance (TMR) design methodology for SPRAM that takes into account the disturbances during read operations and the data retention periods. We have clarified that the thermal stability factor (E/k BT) of TMR must be higher than 64 to ensure a 10-year data retention and a continual non-destructive read-operation. Moreover, the thick synthetic ferromagnetic free layer with Fe-rich CoFeB can achieve a E/kBT of 64 while maintaining a low write cell current of less than 400 μA/cell with a 100 x 160 nm2 TMR.

Original languageEnglish
Title of host publication2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design, Proceedings, NVSMW/ICMTD
Pages54-55
Number of pages2
DOIs
Publication statusPublished - 2008 Sep 1
Event2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design, NVSMW/ICMTD - Opio, France
Duration: 2008 May 182008 May 22

Publication series

Name2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design, Proceedings, NVSMW/ICMTD

Other

Other2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design, NVSMW/ICMTD
CountryFrance
CityOpio
Period08/5/1808/5/22

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Takemura, R., Kawahara, T., Hayakawa, J., Miura, K., Ito, K., Yamanouchi, M., Ikeda, S., Takahashi, H., Matsuoka, H., & Ohno, H. (2008). TMR design methodology for SPin-transfer torque RAM (SPRAM) with nonvolatile and SRAM compatible operations. In 2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design, Proceedings, NVSMW/ICMTD (pp. 54-55). [4531822] (2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design, Proceedings, NVSMW/ICMTD). https://doi.org/10.1109/NVSMW.2008.22