Threshold voltage controlled by gate area and gate recess in inverted trapezoidal trigate AlGaN/GaN MOS high-electron-mobility transistors with photoenhanced chemical and plasma-enhanced atomic layer deposition oxides

Po Chun Yeh; Yun Wei Lin; Yue Lin Huang; Jui Hung Hung; Bo Ren Lin; Lucas Yang; Cheng Han Wu; Tzu Kuan Wu; Chao Hsin Wu; Lung Han Peng

doi:10.7567/APEX.8.084101

Threshold voltage controlled by gate area and gate recess in inverted trapezoidal trigate AlGaN/GaN MOS high-electron-mobility transistors with photoenhanced chemical and plasma-enhanced atomic layer deposition oxides

Po Chun Yeh, Yun Wei Lin, Yue Lin Huang, Jui Hung Hung, Bo Ren Lin, Lucas Yang, Cheng Han Wu, Tzu Kuan Wu, Chao Hsin Wu, Lung Han Peng

New Industry Creation Hatchery Center (NICHe)

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

An enhancement-mode AlGaN/GaN inverted-trapezoid trigate MOS high-electron-mobility transistor (HEMT), featuring double-layer oxides formed by photoenhanced chemical oxidation and plasma-enhanced atomic layer deposition (PEALD) oxide deposition, was shown to support the threshold voltage (V_th) with linear slopes of 0.36 V/nm and -0.32 V/μm2 scaled with recess depth and device area, respectively. The proposed device exhibited V_th of 1.2 V, current on/off ratio of 10⁸, and f_T/f_max of 9/36 GHz at a gate length/width of 250/360 nm. These observations can be ascribed to the combined effects of (a) an interfacial negative space charge of 3.2 μC/cm² in the gate-recessed device that partially compensates for the spontaneous charge and (b) side-wall passivation that preserves the high-mobility channel.

Original language	English
Article number	084101
Journal	Applied Physics Express
Volume	8
Issue number	8
DOIs	https://doi.org/10.7567/APEX.8.084101
Publication status	Published - 2015 Aug 1

ASJC Scopus subject areas

Engineering(all)
Physics and Astronomy(all)

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Yeh, P. C., Lin, Y. W., Huang, Y. L., Hung, J. H., Lin, B. R., Yang, L., Wu, C. H., Wu, T. K., Wu, C. H., & Peng, L. H. (2015). Threshold voltage controlled by gate area and gate recess in inverted trapezoidal trigate AlGaN/GaN MOS high-electron-mobility transistors with photoenhanced chemical and plasma-enhanced atomic layer deposition oxides. Applied Physics Express, 8(8), [084101]. https://doi.org/10.7567/APEX.8.084101

Threshold voltage controlled by gate area and gate recess in inverted trapezoidal trigate AlGaN/GaN MOS high-electron-mobility transistors with photoenhanced chemical and plasma-enhanced atomic layer deposition oxides. / Yeh, Po Chun; Lin, Yun Wei; Huang, Yue Lin; Hung, Jui Hung; Lin, Bo Ren; Yang, Lucas; Wu, Cheng Han; Wu, Tzu Kuan; Wu, Chao Hsin; Peng, Lung Han.

In: Applied Physics Express, Vol. 8, No. 8, 084101, 01.08.2015.

Research output: Contribution to journal › Article › peer-review

Yeh, PC, Lin, YW, Huang, YL, Hung, JH, Lin, BR, Yang, L, Wu, CH, Wu, TK, Wu, CH & Peng, LH 2015, 'Threshold voltage controlled by gate area and gate recess in inverted trapezoidal trigate AlGaN/GaN MOS high-electron-mobility transistors with photoenhanced chemical and plasma-enhanced atomic layer deposition oxides', Applied Physics Express, vol. 8, no. 8, 084101. https://doi.org/10.7567/APEX.8.084101

Yeh, Po Chun ; Lin, Yun Wei ; Huang, Yue Lin ; Hung, Jui Hung ; Lin, Bo Ren ; Yang, Lucas ; Wu, Cheng Han ; Wu, Tzu Kuan ; Wu, Chao Hsin ; Peng, Lung Han. / Threshold voltage controlled by gate area and gate recess in inverted trapezoidal trigate AlGaN/GaN MOS high-electron-mobility transistors with photoenhanced chemical and plasma-enhanced atomic layer deposition oxides. In: Applied Physics Express. 2015 ; Vol. 8, No. 8.

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abstract = "An enhancement-mode AlGaN/GaN inverted-trapezoid trigate MOS high-electron-mobility transistor (HEMT), featuring double-layer oxides formed by photoenhanced chemical oxidation and plasma-enhanced atomic layer deposition (PEALD) oxide deposition, was shown to support the threshold voltage (Vth) with linear slopes of 0.36 V/nm and -0.32 V/μm2 scaled with recess depth and device area, respectively. The proposed device exhibited Vth of 1.2 V, current on/off ratio of 108, and fT/fmax of 9/36 GHz at a gate length/width of 250/360 nm. These observations can be ascribed to the combined effects of (a) an interfacial negative space charge of 3.2 μC/cm2 in the gate-recessed device that partially compensates for the spontaneous charge and (b) side-wall passivation that preserves the high-mobility channel.",

author = "Yeh, {Po Chun} and Lin, {Yun Wei} and Huang, {Yue Lin} and Hung, {Jui Hung} and Lin, {Bo Ren} and Lucas Yang and Wu, {Cheng Han} and Wu, {Tzu Kuan} and Wu, {Chao Hsin} and Peng, {Lung Han}",

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AU - Huang, Yue Lin

AU - Hung, Jui Hung

AU - Lin, Bo Ren

AU - Yang, Lucas

AU - Wu, Cheng Han

AU - Wu, Tzu Kuan

AU - Wu, Chao Hsin

AU - Peng, Lung Han

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