Three-dimensional integration technology of separate SOI layers for photodetectors and signal processors of CMOS image sensors

Masahide Goto; Kei Hagiwara; Yuki Honda; Masakazu Nanba; Yoshinori Iguchi; Takuya Saraya; Masaharu Kobayashi; Eiji Higurashi; Hiroshi Toshiyoshi; Toshiro Hiramoto

doi:10.1109/ICEP.2016.7486785

Three-dimensional integration technology of separate SOI layers for photodetectors and signal processors of CMOS image sensors

Masahide Goto, Kei Hagiwara, Yuki Honda, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, Toshiro Hiramoto

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

We report on three-dimensional (3-D) integration technology of separate silicon-on-insulator (SOI) layers for photodetectors and signal processors of CMOS image sensors. Photodiode, A/D convertor, and counter were integrated in two SOI layers that were vertically connected by embedded Au electrodes, thereby enabling pixel-parallel operation of image sensor. Photodiode has a P+/N/P-structure to suppress the dark current. We developed the image sensor and confirmed its performance of a wide dynamic range of 96 dB and high resolution of 16 bit. The sensor is promising to next-generation ultimate imaging devices.

Original language	English
Title of host publication	2016 International Conference on Electronics Packaging, ICEP 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	70-73
Number of pages	4
ISBN (Electronic)	9784904090176
DOIs	https://doi.org/10.1109/ICEP.2016.7486785
Publication status	Published - 2016 Jun 7
Externally published	Yes
Event	2016 International Conference on Electronics Packaging, ICEP 2016 - Hokkaido, Japan Duration: 2016 Apr 20 → 2016 Apr 22

Publication series

Name	2016 International Conference on Electronics Packaging, ICEP 2016

Other

Other	2016 International Conference on Electronics Packaging, ICEP 2016
Country/Territory	Japan
City	Hokkaido
Period	16/4/20 → 16/4/22

Keywords

CMOS image sensors
Silicon-on-insulator (SOI)
Three-dimensional (3-D) integration technology

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering
Mechanics of Materials

Access to Document

10.1109/ICEP.2016.7486785

Cite this

Goto, M., Hagiwara, K., Honda, Y., Nanba, M., Iguchi, Y., Saraya, T., Kobayashi, M., Higurashi, E., Toshiyoshi, H., & Hiramoto, T. (2016). Three-dimensional integration technology of separate SOI layers for photodetectors and signal processors of CMOS image sensors. In 2016 International Conference on Electronics Packaging, ICEP 2016 (pp. 70-73). [7486785] (2016 International Conference on Electronics Packaging, ICEP 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICEP.2016.7486785

Three-dimensional integration technology of separate SOI layers for photodetectors and signal processors of CMOS image sensors. / Goto, Masahide; Hagiwara, Kei; Honda, Yuki et al.

2016 International Conference on Electronics Packaging, ICEP 2016. Institute of Electrical and Electronics Engineers Inc., 2016. p. 70-73 7486785 (2016 International Conference on Electronics Packaging, ICEP 2016).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Goto, M, Hagiwara, K, Honda, Y, Nanba, M, Iguchi, Y, Saraya, T, Kobayashi, M, Higurashi, E, Toshiyoshi, H & Hiramoto, T 2016, Three-dimensional integration technology of separate SOI layers for photodetectors and signal processors of CMOS image sensors. in 2016 International Conference on Electronics Packaging, ICEP 2016., 7486785, 2016 International Conference on Electronics Packaging, ICEP 2016, Institute of Electrical and Electronics Engineers Inc., pp. 70-73, 2016 International Conference on Electronics Packaging, ICEP 2016, Hokkaido, Japan, 16/4/20. https://doi.org/10.1109/ICEP.2016.7486785

Goto M, Hagiwara K, Honda Y, Nanba M, Iguchi Y, Saraya T et al. Three-dimensional integration technology of separate SOI layers for photodetectors and signal processors of CMOS image sensors. In 2016 International Conference on Electronics Packaging, ICEP 2016. Institute of Electrical and Electronics Engineers Inc. 2016. p. 70-73. 7486785. (2016 International Conference on Electronics Packaging, ICEP 2016). doi: 10.1109/ICEP.2016.7486785

Goto, Masahide ; Hagiwara, Kei ; Honda, Yuki et al. / Three-dimensional integration technology of separate SOI layers for photodetectors and signal processors of CMOS image sensors. 2016 International Conference on Electronics Packaging, ICEP 2016. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 70-73 (2016 International Conference on Electronics Packaging, ICEP 2016).

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title = "Three-dimensional integration technology of separate SOI layers for photodetectors and signal processors of CMOS image sensors",

abstract = "We report on three-dimensional (3-D) integration technology of separate silicon-on-insulator (SOI) layers for photodetectors and signal processors of CMOS image sensors. Photodiode, A/D convertor, and counter were integrated in two SOI layers that were vertically connected by embedded Au electrodes, thereby enabling pixel-parallel operation of image sensor. Photodiode has a P+/N/P-structure to suppress the dark current. We developed the image sensor and confirmed its performance of a wide dynamic range of 96 dB and high resolution of 16 bit. The sensor is promising to next-generation ultimate imaging devices.",

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AU - Iguchi, Yoshinori

AU - Saraya, Takuya

AU - Kobayashi, Masaharu

AU - Higurashi, Eiji

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AB - We report on three-dimensional (3-D) integration technology of separate silicon-on-insulator (SOI) layers for photodetectors and signal processors of CMOS image sensors. Photodiode, A/D convertor, and counter were integrated in two SOI layers that were vertically connected by embedded Au electrodes, thereby enabling pixel-parallel operation of image sensor. Photodiode has a P+/N/P-structure to suppress the dark current. We developed the image sensor and confirmed its performance of a wide dynamic range of 96 dB and high resolution of 16 bit. The sensor is promising to next-generation ultimate imaging devices.

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Three-dimensional integration technology of separate SOI layers for photodetectors and signal processors of CMOS image sensors

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Keywords

ASJC Scopus subject areas

Access to Document

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