Thermal stress measurement in silicon chips encapsulated in IC plastic packages under temperature cycling

Hideo Miura, Makoto Kitano, Asao Nishimura, Sueo Kawai

Research output: Contribution to journalArticlepeer-review

46 Citations (Scopus)

Abstract

Thermal stress in silicon chips encapsulated in IC plastic packagesis discussed. A stress-sensing chip which can detect the three-dimensional stress components separately is developed. Thermal stress occurs in the silicon chip almost linearly with temperature at the steady state. The stress path with temperature during heating is the same as that during cooling. On theother hand, during temperature cycling, stress hysteresis is observed, and the stress increases gradually with increasing cycles. The stress increase phenomenon occurs due to the viscoelastic phenomenon of the molding compounds.The stress-increase ratio is determined by the relationship between the cycle period and the stress relaxation time of the molding compounds at temperatures of interest.

Original languageEnglish
Pages (from-to)9-15
Number of pages7
JournalJournal of Electronic Packaging, Transactions of the ASME
Volume115
Issue number1
DOIs
Publication statusPublished - 1993 Mar
Externally publishedYes

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Mechanics of Materials
  • Computer Science Applications
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Thermal stress measurement in silicon chips encapsulated in IC plastic packages under temperature cycling'. Together they form a unique fingerprint.

Cite this