Theoretical studies on metal/high-k gate stacks

Kenji Shiraishi, Yasushi Akasaka, Genji Nakamura, Takashi Nakayama, Seiichi Miyazaki, Heiji Watanabe, Akio Ohta, Kenji Ohmori, Toyohiro Chikyow, Yasuo Nara, Kikuo Yamabe, Keisaku Yamada

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

We consider the cause of different behavior of effective work function of gate metals after high and low temperature treatments. After high temperature treatment, reaction between Hf-based bighk dielectrics and a Si substrate generates oxygen vacancies (Vo) in high-k dielectrics, which leads to the subsequent electron transfer from Vo to gate metals. As a result, effective work function of gate metals becomes small and Fermi level pinning of gate metals occurs. Thus, Fermi level pinning is unavoidable phenomena for gate-first-processes. On the other hand, intrinsic hybridization between metal and high-k wave function at the interface is crucial factor to determine effective work function of gate metals after low temperature treatment. Accordingly, interface structures and band structures of metals govern the intrinsic effective work functions of metals.

Original languageEnglish
Title of host publicationECS Transactions - International Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS
Subtitle of host publicationNew Materials, Processes and Equipment, 3
Pages191-204
Number of pages14
Edition1
DOIs
Publication statusPublished - 2007 Dec 1
EventInternational Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS: New Materials, Processes and Equipment, 3 - 211th ECS Meeting - Chicago, IL, United States
Duration: 2007 May 62007 May 10

Publication series

NameECS Transactions
Number1
Volume6
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Conference

ConferenceInternational Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS: New Materials, Processes and Equipment, 3 - 211th ECS Meeting
CountryUnited States
CityChicago, IL
Period07/5/607/5/10

ASJC Scopus subject areas

  • Engineering(all)

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  • Cite this

    Shiraishi, K., Akasaka, Y., Nakamura, G., Nakayama, T., Miyazaki, S., Watanabe, H., Ohta, A., Ohmori, K., Chikyow, T., Nara, Y., Yamabe, K., & Yamada, K. (2007). Theoretical studies on metal/high-k gate stacks. In ECS Transactions - International Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS: New Materials, Processes and Equipment, 3 (1 ed., pp. 191-204). (ECS Transactions; Vol. 6, No. 1). https://doi.org/10.1149/1.2727402