The Flexible Processor - Dynamically Reconfigurable Logic Array for Personal-use Emulation System

Takeshi Ohkawa, Toshiyuki Nozawa, Masanori Fujibayashi, Naoto Miyamoto, Karnan Leo, Soichiro Kita, Koji Kotani, Tadahiro Ohmi

Research output: Contribution to conferencePaperpeer-review

3 Citations (Scopus)

Abstract

A dynamically reconfigurable logic array, i.e., the Flexible Processor, suitable for single chip emulation system is developed. It demonstrates the sequential execution of sub-circuits divided from original circuit, by newly developed Temporal Communication Module (TCM). In order to accelerate emulation speed, a logic element, which can reduce configuration data by 30% as compared to conventional Look-Up-Table, is implemented. The chip (3.9×3.9mm 2) fabricated with 0.6 μm CMOS technology operates at 33 MHz with 5.0 V power supply.

Original languageEnglish
Pages279-282
Number of pages4
Publication statusPublished - 2003 Oct 1
Event2003 Symposium on VLSI Circuits - Kyoto, Japan
Duration: 2003 Jun 122003 Jun 14

Other

Other2003 Symposium on VLSI Circuits
CountryJapan
CityKyoto
Period03/6/1203/6/14

Keywords

  • Emulation
  • Logic element
  • Reconfigurable

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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