The Flexible Processor - Dynamically Reconfigurable Logic Array for Personal-use Emulation System

Takeshi Ohkawa; Toshiyuki Nozawa; Masanori Fujibayashi; Naoto Miyamoto; Karnan Leo; Soichiro Kita; Koji Kotani; Tadahiro Ohmi

The Flexible Processor - Dynamically Reconfigurable Logic Array for Personal-use Emulation System

Takeshi Ohkawa, Toshiyuki Nozawa, Masanori Fujibayashi, Naoto Miyamoto, Karnan Leo, Soichiro Kita, Koji Kotani, Tadahiro Ohmi

Research output: Contribution to conference › Paper › peer-review

3 Citations (Scopus)

Abstract

A dynamically reconfigurable logic array, i.e., the Flexible Processor, suitable for single chip emulation system is developed. It demonstrates the sequential execution of sub-circuits divided from original circuit, by newly developed Temporal Communication Module (TCM). In order to accelerate emulation speed, a logic element, which can reduce configuration data by 30% as compared to conventional Look-Up-Table, is implemented. The chip (3.9×3.9mm ²) fabricated with 0.6 μm CMOS technology operates at 33 MHz with 5.0 V power supply.

Original language	English
Pages	279-282
Number of pages	4
Publication status	Published - 2003 Oct 1
Event	2003 Symposium on VLSI Circuits - Kyoto, Japan Duration: 2003 Jun 12 → 2003 Jun 14

Other

Other	2003 Symposium on VLSI Circuits
Country	Japan
City	Kyoto
Period	03/6/12 → 03/6/14

Keywords

Emulation
Logic element
Reconfigurable

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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The Flexible Processor - Dynamically Reconfigurable Logic Array for Personal-use Emulation System. / Ohkawa, Takeshi; Nozawa, Toshiyuki; Fujibayashi, Masanori; Miyamoto, Naoto; Leo, Karnan; Kita, Soichiro; Kotani, Koji; Ohmi, Tadahiro.

2003. 279-282 Paper presented at 2003 Symposium on VLSI Circuits, Kyoto, Japan.

Research output: Contribution to conference › Paper › peer-review

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AU - Ohkawa, Takeshi

AU - Nozawa, Toshiyuki

AU - Fujibayashi, Masanori

AU - Miyamoto, Naoto

AU - Leo, Karnan

AU - Kita, Soichiro

AU - Kotani, Koji

AU - Ohmi, Tadahiro

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N2 - A dynamically reconfigurable logic array, i.e., the Flexible Processor, suitable for single chip emulation system is developed. It demonstrates the sequential execution of sub-circuits divided from original circuit, by newly developed Temporal Communication Module (TCM). In order to accelerate emulation speed, a logic element, which can reduce configuration data by 30% as compared to conventional Look-Up-Table, is implemented. The chip (3.9×3.9mm 2) fabricated with 0.6 μm CMOS technology operates at 33 MHz with 5.0 V power supply.

AB - A dynamically reconfigurable logic array, i.e., the Flexible Processor, suitable for single chip emulation system is developed. It demonstrates the sequential execution of sub-circuits divided from original circuit, by newly developed Temporal Communication Module (TCM). In order to accelerate emulation speed, a logic element, which can reduce configuration data by 30% as compared to conventional Look-Up-Table, is implemented. The chip (3.9×3.9mm 2) fabricated with 0.6 μm CMOS technology operates at 33 MHz with 5.0 V power supply.

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KW - Reconfigurable

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T2 - 2003 Symposium on VLSI Circuits

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The Flexible Processor - Dynamically Reconfigurable Logic Array for Personal-use Emulation System

Abstract

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Keywords

ASJC Scopus subject areas

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