The effect of Y 2O 3 buffer layer for La 2O 3 gate dielectric film

Kentaro Nakagawa; Kunihiro Miyauchi; Kuniyuki Kakushima; Takeo Hattori; Kazuo Tsutsui; Hiroshi Iwai

doi:10.1109/ESSDER.2005.1546666

The effect of Y ₂O ₃ buffer layer for La ₂O ₃ gate dielectric film

Kentaro Nakagawa, Kunihiro Miyauchi, Kuniyuki Kakushima, Takeo Hattori, Kazuo Tsutsui, Hiroshi Iwai

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

La ₂O ₂, Y ₂O ₃ and La ₂O ₃/Y ₂O ₃ stack dielectric films were deposited on silicon by electron-beam evaporation. Chemical and electrical analyses of the interfacial growths of these films with silicon after heat treatment are performed comparatively. X-ray photoelectron spectroscopy (XPS) analysis reveals that Y ₂O ₃ layer suppresses the formation of SiO ₂ at the interface. The Y ₂O ₃ layer also reduces the hysteresis in capacitance-voltage characteristics and leakage current without changing the equivalent oxide thickness (EOT).

Original language	English
Title of host publication	Proceedings of ESSDERC 2005
Subtitle of host publication	35th European Solid-State Device Research Conference
Pages	387-390
Number of pages	4
DOIs	https://doi.org/10.1109/ESSDER.2005.1546666
Publication status	Published - 2005
Externally published	Yes
Event	ESSDERC 2005: 35th European Solid-State Device Research Conference - Grenoble, France Duration: 2005 Sep 12 → 2005 Sep 16

Publication series

Name	Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference
Volume	2005

Conference

Conference	ESSDERC 2005: 35th European Solid-State Device Research Conference
Country	France
City	Grenoble
Period	05/9/12 → 05/9/16

ASJC Scopus subject areas

Engineering(all)

Access to Document

10.1109/ESSDER.2005.1546666

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Nakagawa, K., Miyauchi, K., Kakushima, K., Hattori, T., Tsutsui, K., & Iwai, H. (2005). The effect of Y ₂O ₃ buffer layer for La ₂O ₃ gate dielectric film. In Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference (pp. 387-390). [1546666] (Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference; Vol. 2005). https://doi.org/10.1109/ESSDER.2005.1546666

The effect of Y ₂O ₃ buffer layer for La ₂O ₃ gate dielectric film. / Nakagawa, Kentaro; Miyauchi, Kunihiro; Kakushima, Kuniyuki; Hattori, Takeo; Tsutsui, Kazuo; Iwai, Hiroshi.

Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference. 2005. p. 387-390 1546666 (Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference; Vol. 2005).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Nakagawa, K, Miyauchi, K, Kakushima, K, Hattori, T, Tsutsui, K & Iwai, H 2005, The effect of Y ₂O ₃ buffer layer for La ₂O ₃ gate dielectric film. in Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference., 1546666, Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference, vol. 2005, pp. 387-390, ESSDERC 2005: 35th European Solid-State Device Research Conference, Grenoble, France, 05/9/12. https://doi.org/10.1109/ESSDER.2005.1546666

Nakagawa K, Miyauchi K, Kakushima K, Hattori T, Tsutsui K, Iwai H. The effect of Y ₂O ₃ buffer layer for La ₂O ₃ gate dielectric film. In Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference. 2005. p. 387-390. 1546666. (Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference). https://doi.org/10.1109/ESSDER.2005.1546666

@inproceedings{9cd70a3d0c61419a8285c8ea0336fbd9,

title = "The effect of Y 2O 3 buffer layer for La 2O 3 gate dielectric film",

abstract = "La 2O 2, Y 2O 3 and La 2O 3/Y 2O 3 stack dielectric films were deposited on silicon by electron-beam evaporation. Chemical and electrical analyses of the interfacial growths of these films with silicon after heat treatment are performed comparatively. X-ray photoelectron spectroscopy (XPS) analysis reveals that Y 2O 3 layer suppresses the formation of SiO 2 at the interface. The Y 2O 3 layer also reduces the hysteresis in capacitance-voltage characteristics and leakage current without changing the equivalent oxide thickness (EOT).",

author = "Kentaro Nakagawa and Kunihiro Miyauchi and Kuniyuki Kakushima and Takeo Hattori and Kazuo Tsutsui and Hiroshi Iwai",

year = "2005",

doi = "10.1109/ESSDER.2005.1546666",

language = "English",

isbn = "0780392035",

series = "Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference",

pages = "387--390",

booktitle = "Proceedings of ESSDERC 2005",

note = "ESSDERC 2005: 35th European Solid-State Device Research Conference ; Conference date: 12-09-2005 Through 16-09-2005",

}

TY - GEN

T1 - The effect of Y 2O 3 buffer layer for La 2O 3 gate dielectric film

AU - Nakagawa, Kentaro

AU - Miyauchi, Kunihiro

AU - Kakushima, Kuniyuki

AU - Hattori, Takeo

AU - Tsutsui, Kazuo

AU - Iwai, Hiroshi

PY - 2005

Y1 - 2005

N2 - La 2O 2, Y 2O 3 and La 2O 3/Y 2O 3 stack dielectric films were deposited on silicon by electron-beam evaporation. Chemical and electrical analyses of the interfacial growths of these films with silicon after heat treatment are performed comparatively. X-ray photoelectron spectroscopy (XPS) analysis reveals that Y 2O 3 layer suppresses the formation of SiO 2 at the interface. The Y 2O 3 layer also reduces the hysteresis in capacitance-voltage characteristics and leakage current without changing the equivalent oxide thickness (EOT).

AB - La 2O 2, Y 2O 3 and La 2O 3/Y 2O 3 stack dielectric films were deposited on silicon by electron-beam evaporation. Chemical and electrical analyses of the interfacial growths of these films with silicon after heat treatment are performed comparatively. X-ray photoelectron spectroscopy (XPS) analysis reveals that Y 2O 3 layer suppresses the formation of SiO 2 at the interface. The Y 2O 3 layer also reduces the hysteresis in capacitance-voltage characteristics and leakage current without changing the equivalent oxide thickness (EOT).

UR - http://www.scopus.com/inward/record.url?scp=33751405358&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33751405358&partnerID=8YFLogxK

U2 - 10.1109/ESSDER.2005.1546666

DO - 10.1109/ESSDER.2005.1546666

M3 - Conference contribution

AN - SCOPUS:33751405358

SN - 0780392035

SN - 9780780392038

T3 - Proceedings of ESSDERC 2005: 35th European Solid-State Device Research Conference

SP - 387

EP - 390

BT - Proceedings of ESSDERC 2005

T2 - ESSDERC 2005: 35th European Solid-State Device Research Conference

Y2 - 12 September 2005 through 16 September 2005

ER -