Test generation and fault localization for quantum circuits

Marek Perkowski; Jacob Biamonte; Martin Lukac

Test generation and fault localization for quantum circuits

Marek Perkowski, Jacob Biamonte, Martin Lukac

INF - Computer and Mathematical Sciences

Research output: Contribution to journal › Conference article › peer-review

31 Citations (Scopus)

Abstract

It is believed that quantum computing will begin to have a practical impact in industry around year 2010. We propose an approach to test generation and fault localization for a wide category of fault models. While in general we follow the methods used in test of standard circuits, there are two significant differences: (2) we use both deterministic and probabilistic tests to detect faults, (2) we use special measurement gates to determine the internal states. A Fault Table is created that includes probabilistic information. "Probabilistic set covering" and "probabilistic adaptive trees" that generalize those known in standard circuits, are next used.

Original language	English
Pages (from-to)	62-68
Number of pages	7
Journal	Proceedings of The International Symposium on Multiple-Valued Logic
Publication status	Published - 2005 Sep 20
Event	35th International Symposium on Multiple-Valued Logic, ISMVL 2005 - Calgary, Alta., Canada Duration: 2005 May 19 → 2005 May 21

ASJC Scopus subject areas

Computer Science(all)
Mathematics(all)

Cite this

@article{a74e4ab6883b42f0a7dc7d566d4a74ac,

title = "Test generation and fault localization for quantum circuits",

abstract = "It is believed that quantum computing will begin to have a practical impact in industry around year 2010. We propose an approach to test generation and fault localization for a wide category of fault models. While in general we follow the methods used in test of standard circuits, there are two significant differences: (2) we use both deterministic and probabilistic tests to detect faults, (2) we use special measurement gates to determine the internal states. A Fault Table is created that includes probabilistic information. {"}Probabilistic set covering{"} and {"}probabilistic adaptive trees{"} that generalize those known in standard circuits, are next used.",

author = "Marek Perkowski and Jacob Biamonte and Martin Lukac",

year = "2005",

month = sep,

day = "20",

language = "English",

pages = "62--68",

journal = "Proceedings of The International Symposium on Multiple-Valued Logic",

issn = "0195-623X",

publisher = "IEEE Computer Society",

note = "35th International Symposium on Multiple-Valued Logic, ISMVL 2005 ; Conference date: 19-05-2005 Through 21-05-2005",

}

TY - JOUR

T1 - Test generation and fault localization for quantum circuits

AU - Perkowski, Marek

AU - Biamonte, Jacob

AU - Lukac, Martin

PY - 2005/9/20

Y1 - 2005/9/20

N2 - It is believed that quantum computing will begin to have a practical impact in industry around year 2010. We propose an approach to test generation and fault localization for a wide category of fault models. While in general we follow the methods used in test of standard circuits, there are two significant differences: (2) we use both deterministic and probabilistic tests to detect faults, (2) we use special measurement gates to determine the internal states. A Fault Table is created that includes probabilistic information. "Probabilistic set covering" and "probabilistic adaptive trees" that generalize those known in standard circuits, are next used.

AB - It is believed that quantum computing will begin to have a practical impact in industry around year 2010. We propose an approach to test generation and fault localization for a wide category of fault models. While in general we follow the methods used in test of standard circuits, there are two significant differences: (2) we use both deterministic and probabilistic tests to detect faults, (2) we use special measurement gates to determine the internal states. A Fault Table is created that includes probabilistic information. "Probabilistic set covering" and "probabilistic adaptive trees" that generalize those known in standard circuits, are next used.

UR - http://www.scopus.com/inward/record.url?scp=24644492246&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=24644492246&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:24644492246

SP - 62

EP - 68

JO - Proceedings of The International Symposium on Multiple-Valued Logic

JF - Proceedings of The International Symposium on Multiple-Valued Logic

SN - 0195-623X

T2 - 35th International Symposium on Multiple-Valued Logic, ISMVL 2005

Y2 - 19 May 2005 through 21 May 2005

ER -

Test generation and fault localization for quantum circuits

Abstract

ASJC Scopus subject areas

Other files and links

Fingerprint

Cite this