Ta2O5 interfacial layer between GST and W plug enabling low power operation of phase change memories

Y. Matsui, K. Kurotsuchi, O. Tonomura, T. Morikawa, M. Kinoshita, Y. Fujisaki, N. Matsuzaki, S. Hanzawa, M. Terao, N. Takaura, H. Moriya, T. Iwasaki, M. Moniwa, T. Koga

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    17 Citations (Scopus)

    Abstract

    A novel memory cell for phase-change memories (PCMs) that enables low-power operation has been developed. Power (i.e., current and voltage) for the cell is significantly reduced by inserting a very thin Ta2O5 film between GeSbTe (GST) and a W plug. The Ta2O5 interfacial layer works not only as a heat insulator enabling effective heat generation in GST but also as an adhesion layer between GST and SiO2 underneath. Nonetheless, sufficient current flows through the interfacial layer due to direct tunneling. A low programming power of 1.5 V/100 μA can therefore be obtained even on a W plug with a diameter of 180 nm fabricated using standard 0.13-μm CMOS technology. In addition, the uniformity and repeatability of cell resistance are excellent because of the inherently stable Ta 2O5 film properties.

    Original languageEnglish
    Title of host publication2006 International Electron Devices Meeting Technical Digest, IEDM
    DOIs
    Publication statusPublished - 2006 Dec 1
    Event2006 International Electron Devices Meeting, IEDM - San Francisco, CA, United States
    Duration: 2006 Dec 102006 Dec 13

    Publication series

    NameTechnical Digest - International Electron Devices Meeting, IEDM
    ISSN (Print)0163-1918

    Other

    Other2006 International Electron Devices Meeting, IEDM
    CountryUnited States
    CitySan Francisco, CA
    Period06/12/1006/12/13

    ASJC Scopus subject areas

    • Electronic, Optical and Magnetic Materials
    • Condensed Matter Physics
    • Electrical and Electronic Engineering
    • Materials Chemistry

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  • Cite this

    Matsui, Y., Kurotsuchi, K., Tonomura, O., Morikawa, T., Kinoshita, M., Fujisaki, Y., Matsuzaki, N., Hanzawa, S., Terao, M., Takaura, N., Moriya, H., Iwasaki, T., Moniwa, M., & Koga, T. (2006). Ta2O5 interfacial layer between GST and W plug enabling low power operation of phase change memories. In 2006 International Electron Devices Meeting Technical Digest, IEDM [4154327] (Technical Digest - International Electron Devices Meeting, IEDM). https://doi.org/10.1109/IEDM.2006.346908