Systolic architecture for computational fluid dynamics on FPGAs

Kentaro Sano, Takanori Iizuka, Satoru Yamamoto

Research output: Chapter in Book/Report/Conference proceedingConference contribution

38 Citations (Scopus)

Abstract

This paper presents an FPGA-based flow solver based on the systolic architecture. We show that the fractionalstep method employing central difference schemes can be expressed as a systolic algorithm, and therefore the systolic architecture is suitable for a dedicated processor to the flow solver. We have designed a 2D systolic array of cells, each of which has a micro-programmable data-path containing a MAC (multiplication and accumulation) unit and a local memory to store necessary data for computational fluid dynamics. With ALTERA Stratix II FPGA, we implemented 96(= 12 x 8) cells running at 60MHz. Since the MAC unit has both an adder and a multiplier for single-precision floating-point numbers, the total peak performance is 11.5(= 96 x 6MHz x 2) GFlops. We made a choice of 2D square driven cavity flow as a benchmark computation based on the fractional-step method. For this computation, the FPGA-based processor running only at 60MHz achieved 7.14 and 6.41 times faster computations than Pentium4 processor at 3.2 GHz and Itanium2 at 1.4 GHz, respectively.

Original languageEnglish
Title of host publicationProceedings 2007 IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2018
PublisherIEEE Computer Society
Pages107-116
Number of pages10
ISBN (Print)0769529402, 9780769529400
DOIs
Publication statusPublished - 2007 Jan 1
Event15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007 - Napa, CA, United States
Duration: 2007 Apr 232007 Apr 25

Publication series

NameProceedings 2007 IEEE Symposium on Field-Programme Custom Computing Machines, FCCM 2007

Other

Other15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2007
CountryUnited States
CityNapa, CA
Period07/4/2307/4/25

ASJC Scopus subject areas

  • Hardware and Architecture
  • Software
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Systolic architecture for computational fluid dynamics on FPGAs'. Together they form a unique fingerprint.

  • Cite this

    Sano, K., Iizuka, T., & Yamamoto, S. (2007). Systolic architecture for computational fluid dynamics on FPGAs. In Proceedings 2007 IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2018 (pp. 107-116). [4297248] (Proceedings 2007 IEEE Symposium on Field-Programme Custom Computing Machines, FCCM 2007). IEEE Computer Society. https://doi.org/10.1109/FCCM.2007.20