Synthetic electric field tunnel FETs: Drain current multiplication demonstrated by wrapped gate electrode around ultrathin epitaxial channel

Y. Morita, T. Mori, S. Migita, W. Mizubayashi, A. Tanabe, K. Fukuda, T. Matsukawa, K. Endo, S. O'Uchi, Y. X. Liu, M. Masahara, H. Ota

Research output: Chapter in Book/Report/Conference proceedingConference contribution

41 Citations (Scopus)

Abstract

A synthetic electric field effect to enhance the tunnel FET (TFET) performances is proposed. The TFET utilizes both orthogonal and parallel electric fields induced by a wrapped gate electrode configuration. The device concept was experimentally verified by fabricating Si-TFETs integrated with ultrathin epitaxial channel. Scaling of both the channel width and channel thickness enhances the TFET performance owing to the enhanced synthetic electric field. The results predict that a fin-shape structure is promising for TFETs.

Original languageEnglish
Title of host publication2013 Symposium on VLSI Technology, VLSIT 2013 - Digest of Technical Papers
PagesT236-T237
Publication statusPublished - 2013 Sep 9
Externally publishedYes
Event2013 Symposium on VLSI Technology, VLSIT 2013 - Kyoto, Japan
Duration: 2013 Jun 112013 Jun 13

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)0743-1562

Other

Other2013 Symposium on VLSI Technology, VLSIT 2013
CountryJapan
CityKyoto
Period13/6/1113/6/13

Keywords

  • orthogonal electric field
  • parallel electric field
  • tunnel FET
  • ultrathin channel
  • wrapped around gate

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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