A synthesis is presented of multiple-valued logic networks with the minimum number of T-gates. A ULM implicant is defined in the multiple-valued logic system. One ULM implicant implies a possible reduction of a certain number of T-gates in a tree structure. The optimal T-gate network is obtained by finding the compatible set of ULM implicants containing the possible reduction of the maximum number of T-gates. An implicit enumeration method is introduced in the synthesis algorithm so that the optimal compatible set can be found in a short computation time. The method is also developed for synthesizing a tree structure using equal residue functions.
|Number of pages||6|
|Journal||Proceedings of The International Symposium on Multiple-Valued Logic|
|Publication status||Published - 1979 Jan 1|
|Event||Proc Int Symp Mult Valued Logic 9th - Bath, Engl|
Duration: 1979 May 29 → 1979 May 31
ASJC Scopus subject areas
- Computer Science(all)