TY - JOUR
T1 - Surface selective deposition of molecular semiconductors for solution-based integration of organic field-effect transistors
AU - Minari, Takeo
AU - Kano, Masataka
AU - Miyadera, Tetsuhiko
AU - Wang, Sui Dong
AU - Aoyagi, Yoshinobu
AU - Tsukagoshi, Kazuhito
N1 - Funding Information:
The authors would like to thank Professor K. Takimiya (Hiroshima University), Dr. M. Ikeda (Nippon Kayaku Co.), and Dr. H. Maeda (Dai Nippon Printing Co.) for valuable suggestions. This study was supported in part by Grants-In-Aid for Scientific Research (Grant Nos. 16GS50219, 17069004, and 18201028) from the Ministry of Education, Culture, Sport, Science, and Technology of Japan.
PY - 2009
Y1 - 2009
N2 - A bottom-up fabrication technique for the preparation of self-organized organic field-effect transistors (OFETs) on flexible plastic substrates is presented. Solution-based self-organization of OFETs is achieved by patterning the insulator surface with solution-wettable and unwettable regions. The proposed method satisfies several important requirements of printable electronics, including reduction in energy consumption, minimization of facilities, and the on-demand use of molecular materials. Self-organized OFETs display an average mobility of 0.53 cm2 / (V s), on/off ratio of 109, and subthreshold slope of 0.18 V/dec, with near-zero and narrowly distributed threshold voltage. An inverter circuit prepared using these devices is demonstrated with high signal gain.
AB - A bottom-up fabrication technique for the preparation of self-organized organic field-effect transistors (OFETs) on flexible plastic substrates is presented. Solution-based self-organization of OFETs is achieved by patterning the insulator surface with solution-wettable and unwettable regions. The proposed method satisfies several important requirements of printable electronics, including reduction in energy consumption, minimization of facilities, and the on-demand use of molecular materials. Self-organized OFETs display an average mobility of 0.53 cm2 / (V s), on/off ratio of 109, and subthreshold slope of 0.18 V/dec, with near-zero and narrowly distributed threshold voltage. An inverter circuit prepared using these devices is demonstrated with high signal gain.
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U2 - 10.1063/1.3095665
DO - 10.1063/1.3095665
M3 - Article
AN - SCOPUS:62149143240
VL - 94
JO - Applied Physics Letters
JF - Applied Physics Letters
SN - 0003-6951
IS - 9
M1 - 093307
ER -