Study of Stochastic Invertible Multiplier Designs

Kaito Nishino, Sean C. Smithson, Naoya Onizawa, Brett H. Meyer, Warren J. Gross, Hitoshi Yamagata, Hiroyuki Fujita, Takahiro Hanyu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Invertible logic is a method of reversible computing that can propagate a circuit signal backward from outputs. For example, not only multiplication (forward operation) but also division and factorization (backward operation) can be performed by this circuit style of a single multiplier. Currently, invertible logic has been able to realize only small-scale circuits. In this paper, we design larger-scale circuits than that reported conventionally, using stochastic computing. Furthermore, we also verify the performance of invertible logic using three different multipliers.

Original languageEnglish
Title of host publication2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages649-650
Number of pages2
ISBN (Electronic)9781538695623
DOIs
Publication statusPublished - 2019 Jan 17
Event25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018 - Bordeaux, France
Duration: 2018 Dec 92018 Dec 12

Publication series

Name2018 25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018

Conference

Conference25th IEEE International Conference on Electronics Circuits and Systems, ICECS 2018
CountryFrance
CityBordeaux
Period18/12/918/12/12

Keywords

  • Bidirectional computation
  • Factorization
  • Hamiltonian
  • Multiplier
  • Stochastic computing

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Instrumentation

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