Statistical analysis of threshold voltage variation using MOSFETs with asymmetric source and drain

Shinya Ichino, Akinobu Teramoto, Rihito Kuroda, Takezo Mawaki, Tomoyuki Suwa, Shigetoshi Sugawa

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

Threshold voltage variation is considered to be caused by various factors, such as random dopant fluctuation, surface roughness, metal gate granularity, and so on. Its magnitude (σVth) is proportional to the reciprocal of the square root of the gate area in conventional rectangular transistors. In this letter, the statistical analysis of the threshold voltage variation of trapezoidal and octagonal transistors that have asymmetric gate widths at source and drain side was discussed, in addition to the rectangular transistors. From the statistical analysis, it is experimentally demonstrated that σVth is correlated with the gate width at source side (WS), not average gate width (Wave) which determines the gate area. Therefore, it is considered that σVth is characterized by the common parameter of WS even if the main factor of the threshold voltage variation would be changed.

Original languageEnglish
Article number8482471
Pages (from-to)1836-1839
Number of pages4
JournalIEEE Electron Device Letters
Volume39
Issue number12
DOIs
Publication statusPublished - 2018 Dec

Keywords

  • Asymmetric gate transistor
  • MOSFET
  • statistical variation
  • threshold voltage

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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