We developed a source/drain contact (S/D) resistance model for silicided thin-film SOI MOSFET’s, and analyzed its dependence on device parameters considering the variation in the thickness of the silicide and residual SOI layers due to silicidation. The S/D resistance is insensitive to the silicide thickness over a wide range of thicknesses; however, it increases significantly when the silicide thickness is less than one hundredth of initial SOI thickness, and when almost all the SOI layer is silicided. To obtain a low S/D resistance, the specific contact resistance must be reduced, that is, the doping concentration at the silicide-SOI interface must be more than 102() cm-3.
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering